East Asian Technology Intelligence
Japan & China tech news — translated, contextualized, and delivered for Western readers.
Free. Unsubscribe anytime.
This story ran in Issue #87, alongside three other stories.
China is moving faster to package its own chips. This path gives Beijing a way around US front-end sanctions. It lets China build faster chips without using top-tier lithography tools. Western observers focus on ASML and the lack of DUV or EUV tools. Yet, Chinese tool firms like Naura and AMEC are using their strength in mature etching and deposition tools to lead the back-end market. China does not need to match Western transistor density. Instead, it is improving what its current fabs can already build.
This change shows China sees advanced packaging as a key tool. In the past, Japan used a similar plan under METI guidance to build up its own car supply chain. For years, China tried to copy front-end chip design. Now, the focus is on assembly speed. China wants to boost power by stacking chips in HBM and 3D setups. This shift moves the battle to clever manufacturing and chip integration. It is no longer just a race for smaller nanometer sizes.
Chinese media, like the outlet *ETNews*, calls this a key step for safety. These reports show China believes that using foreign packaging firms is too risky. This plan is really an industrial policy disguised as supply chain backup. The Chinese market for hybrid bonding, dicing, and wafer thinning tools is growing fast. This growth creates a strong domestic market for these special tools. This move lets China avoid the immediate need for banned EUV machines.
Still, this path has a major downside. It boosts the real speed of Chinese chips, but it does not close the basic gap in transistor tech. The next wave of AI tasks will need both dense front-end logic and advanced packaging. If so, China will still face a limit due to its lack of top lithography tools. This packaging push is a smart way to lessen the harm from current sanctions. However, it does not offer a direct path to the very best silicon.
Keep an eye on the order books and sales at Naura, AMEC, and HuaHai Qingke. Look closely at the packaging divisions of these firms. Watch for their market share growth in hybrid bonding and dicing tools inside Chinese fabs. You should also watch for growth plans from big local assembly firms like JCET and Huatian Technology. These plans will show where these domestic tools are going to work at scale.
For the wider picture, see China Semiconductor Ecosystem.
This story appeared in AsiaAI.FYI Issue #87.
Get this in your inbox each week — subscribe free.
