KYEC

京元電子 / 京元電子股份有限公司

A Taiwan-based outsourced semiconductor test specialist providing critical wafer probing, final test, and high-power burn-in services for AI GPUs and high-performance computing chips.

TWSE: 2449
Profile as of September 14, 2026
#23 in the AsiaAI Tech Index
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KYEC is a direct beneficiary of AI chip complexity, as advanced accelerators require intensive testing and high-power burn-in. Its growth is driven by AI demand, but this increases capital intensity, depreciation risk, and reliance on a few major customer programs.

Key figures

Revenue FY2025: NT$34.933 billion
Revenue growth FY2025: 30.1%
Operating margin FY2025: 25.8%
Net income FY2025: NT$11.179 billion
R&D spend FY2025: NT$942.1 million (2.70% of revenue)
Capital expenditure FY2025: Not disclosed
Market capitalization 2026-09-11: NT$321.6 billion Estimate
FY2025 capital expenditure budget FY2025: NT$37.0 billion
AI and HPC revenue share December 2024: About 25%
Wafer-probing capacity March 2026: Roughly 350,000 wafers per month
Installed test systems March 2026: More than 5,200

Overview

King Yuan Electronics Co., Ltd. was founded in 1987 and operates as an independent outsourced semiconductor test specialist. Its manufacturing footprint is heavily concentrated in Taiwan, with major facilities located in Hsinchu, Chu-Nan, Tongluo, Toufen, and Yangmei, alongside a recent expansion into Singapore.

The company provides a comprehensive suite of services including wafer probing, final test, burn-in, and system-level testing. It supplements commercial automatic test equipment with internally developed test platforms, probe cards, and automation tooling. Testing services account for approximately 97% of its total revenue.

Structurally, KYEC sits between wafer fabrication and final assembly. It does not manufacture silicon or package chips itself, but it qualifies the reliability and electrical performance of advanced processors before they are shipped to server and device makers. This pure-play testing focus allows it to serve a wide range of fabless designers and integrated device manufacturers without competing against them in chip design or advanced packaging.

The AI angle

KYEC captures value from the artificial intelligence boom through increased test complexity and duration. AI GPUs, custom ASICs, and networking processors require significantly longer test times, higher power delivery during testing, and more rigorous system-level validation than legacy semiconductor products.

The company provides specialized high-power burn-in capabilities, including a 3,000-watt liquid-cooled burn-in oven specifically designed for AI chip mass production. AI and high-performance computing products represented about 25% of company revenue in December 2024, while advanced-process products accounted for 33%.

KYEC tests chips for major semiconductor designers including Nvidia, Broadcom, AMD, and Marvell. It does not disclose revenue by named customer, but its financial growth is directly tied to the volume and complexity of these advanced AI programs. Because AI accelerators are expensive and mission-critical, customers rely on KYEC's rigorous testing to ensure reliability before the chips are deployed in data centers. This dynamic increases the test content per chip, driving higher utilization and revenue for KYEC even if overall semiconductor unit volumes remain flat.

Technology and moat

KYEC's competitive advantage lies in its scale as a pure-play test provider and its deep integration with customer production flows. It operates more than 5,200 test systems and processes roughly 350,000 12-inch-equivalent wafers per month.

Its technical moat includes internally developed equipment, such as high-power burn-in ovens, automated loading systems, and high-speed interfaces. This internal engineering capability allows it to customize test environments for high-power AI accelerators more rapidly than relying solely on commercial equipment vendors.

The strongest barrier to entry, however, is customer qualification. Requalifying high-volume AI programs with a new test provider takes significant time and engineering effort, especially when the test flow relies on custom thermal designs, specific handler integration, and established yield correlation data. Once an AI chip is qualified on KYEC's platforms, customers face high switching costs to move that volume to a competitor.

Five-pillar assessment

Scale and market position: A major pure-play semiconductor test provider with over 5,200 installed test systems and roughly 350,000 wafers per month of probing capacity.
Technology and R&D: Differentiated by internally developed high-power burn-in ovens, automated handling systems, and established production qualifications for complex AI accelerators.
Supply-chain centrality: Serves leading AI chip designers including Nvidia, Broadcom, and AMD, while relying on Advantest and Teradyne for core test equipment.
Financial momentum: Strong revenue growth and margin expansion driven by AI test demand, accompanied by a significantly increased capital expenditure budget.
Governance and quality: Independent, publicly listed company with professional management, transparent reporting, and a standard board structure, though heavily concentrated in Taiwan.

Supply chain and relationships

KYEC depends on commercial test equipment from specialized suppliers including Advantest, Teradyne, and Yokogawa Test & Measurement. It also requires a steady supply of probe cards, test sockets, burn-in boards, and stable electricity and cleanroom infrastructure to maintain its high-volume operations.

On the customer side, KYEC serves major semiconductor designers including Nvidia, Broadcom, AMD, Intel, Marvell, MediaTek, and Alchip. The company states that 48% of the global top 50 semiconductor companies use its test services.

Its test volumes ultimately depend on its customers securing upstream wafer fabrication and advanced packaging capacity from foundries like TSMC. If a bottleneck occurs in advanced packaging or high-bandwidth memory supply, the resulting delay in chip production directly reduces the volume of chips entering KYEC's test facilities.

Customers

NVIDIAAI GPU-related testing
BroadcomAI-chip and ASIC testing demand
AMDIncludes Xilinx
IntelUses testing services
MarvellUses testing services
MediaTekUses testing services
AlchipUses testing services

Suppliers

AdvantestAutomated test-equipment platforms
TeradyneAutomated test-equipment platforms
Yokogawa Test & MeasurementTest platforms

Competitors

ASE Technology HoldingInferredCompetes in outsourced semiconductor assembly and test
Siliconware Precision IndustriesInferredCompetes in outsourced semiconductor test and assembly
Powertech TechnologyInferredCompetes for outsourced memory, logic, and AI test workloads
ChipMOS TechnologiesInferredCompetes in IC testing
Sigurd MicroelectronicsInferredCompetes in IC testing and related backend services

Geopolitics and risk

KYEC's primary operational risk is its geographic concentration in Taiwan, which exposes it to cross-strait geopolitical tensions, shipping disruptions, and local power and water constraints. Its most advanced test systems and cleanrooms are located on the island.

The company is also exposed to United States export controls on China's semiconductor sector, which dictate where its global customers can ship advanced AI chips and influence broader supply-chain sourcing.

To diversify its manufacturing footprint and address customer demands for geographic resilience, KYEC established its first overseas testing facility in Singapore in 2026. It is also planning a United States factory. While these overseas expansions reduce single-location risk, they introduce new execution challenges, including higher operating costs, the need to localize supply chains, and the requirement to secure new customer production qualifications.

Risk matrix
Risk	Severity	Why it matters
Taiwan Strait disruption	High	Principal production base and capacity remain in Taiwan.
Customer concentration	High	A pause in a major GPU or ASIC program can leave capacity underutilized.
Export-control exposure	High	U.S. restrictions on China's semiconductor sector shape customer sourcing.
High capital-intensity risk	High	Expanding capacity raises execution, utilization, and depreciation risk.
AI supply-chain bottlenecks	High	Upstream delays in wafers or packaging can delay chips entering test flow.
Technology obsolescence	Medium	Failure to maintain qualified equipment could shift programs to competitors.
Competition from integrated OSATs	Medium	Rivals bundling packaging and testing can attract customers.
Electricity and water supply	Medium	Capacity growth increases dependence on stable power and environmental compliance.

Governance and ownership

KYEC is an independent public company listed on the Taiwan Stock Exchange. It is not state-owned or controlled by a larger industrial group. Institutional investors hold significant stakes, and cross-holdings exist with other Taiwan semiconductor companies such as Siliconware Precision Industries and United Microelectronics Corporation, but KYEC operates independently.

The company is led by Chairman Chi-Chun Hsieh and President Gauss Chang. It maintains a nine-member board that includes three independent directors, alongside standard audit, compensation, and sustainability committees. Its financial statements are audited by Ernst & Young, providing a standard level of public-market transparency and corporate governance.

What to watch

Execution of FY2025 and FY2026 expansion plans into customer-qualified high-power test capacity.
Whether AI and HPC revenue rises materially above the approximately 25% disclosed for December 2024.
Whether final-test and wafer-probing utilization remains high enough to support returns on expanded factories.
Whether Singapore capacity secures production qualifications and reduces Taiwan concentration.
Whether operating margin remains near or above 25.8% as depreciation and overseas expansion costs increase.

Recent developments

June 2026Chi-Chun Hsieh became chairman, replacing Chin-Kung Lee.
2026Established its first overseas testing facility in Singapore and continued planning for a U.S. factory.
December 31, 2025Reported FY2025 revenue of NT$34.933 billion, up 30% year over year.
August 8, 2025Raised its FY2025 capital-expenditure budget to NT$37.0 billion to support AI-chip test demand.

Coverage on AsiaAI.FYI

Infineon’s GaN Surge: How AI Data Centres Are Reshaping the Power Chip Supply Chain September 7, 2026
Will Beijing’s Veto of Meta’s Manus Spin-off Redefine AI Sovereignty? August 12, 2026

Guides that cover KYEC

Taiwan Semiconductor Ecosystem

About this profile

Compiled with AI-assisted research from company filings, market data, and published reporting as of September 14, 2026, then reviewed by AsiaAI.FYI. Figures marked Estimate are not company-reported. Check primary filings before relying on any number.

Confidence: B. Audited financial and operational information is strong, but market capitalization, actual capital expenditure, and specific customer revenue shares are weaker or undisclosed.

Main sources: KYEC audited financial statements and 2026 annual general meeting handbook; KYEC FY2025 investor presentation; KYEC FY2024 annual report; KYEC corporate-governance and management disclosures.

All 59 sources

Position in the AI stack

Sits between wafer fabrication and shipment, performing production test and reliability qualification for high-value AI accelerators and custom silicon.

Legal name: King Yuan Electronics Co., Ltd.
Headquarters: Hsinchu City, Taiwan
Founded: 1987
Founders: Chin-Kung Lee / 李金恭
Leadership: Chi-Chun Hsieh / 謝志純, Chairman
Gauss Chang / 張高勳, President
Employees: 8,690 (2025-12-31)
Ownership: Publicly listed
Listings: TWSE: 2449
Business: Outsourced semiconductor test specialist
Sector: Packaging, Test & Substrates
Website: kyec.com.tw